Over the past two years, I've been researching patterned dielectric supper-latices in the Dean Lab at Columbia. Lead by Cory Dean, this lab studies two dimensional materials, like graphene (an atomically thin layer of graphite), investigating their electrical properties and creating heterostructures to modify these properties.

While the bulk of experiments in this field are preformed by making layered structures of different two dimensional materials, the work that I have continued investigates how we can employ nano scale lithography to fine tune the properties of graphene and other 2D materials. I employ cutting edge lithography techniques use a positive silicon-based resist to make lattices of pillars on a silicon chip. These pillars are about 15nm tall with a spacing all the way down to 17nm peak to peak. When a sheet of graphene is layered on the pillars and a voltage is applied to the silicon chip, a varying electrical potential is applied to the graphene sheet, modifying the band structure of the graphene. This change to the properties of the graphene sheet is completely controlled by the voltage applied, so it can be turned on and off at will.